Since 1995

Fiber Solutions

Fiber Optic Manufacturer

China Factory.

Send Enquiry Now

Specialized Fiber Optic Products Manufacturer Since 1995. Professional Data Center Fiber Solutions from Huihong Technologies.

Since 1995

Fiber Solutions

Fiber Optic Manufacturer

China Factory.

Send Enquiry Now

40G QSFP LR4 Fiber Optic Transceiver

The QSFP-40G-LR4 is a transceiver module designed for 10Km optical communication applications. The design is compliant to 40GBASE-LR4 of the IEEE P802.3ba standard. The module converts 4 inputs channels (ch) of 10Gb/s electrical data to 4 CWDM optical signals, and multiplexes them into a single channel for 40Gb/s optical transmission. Reversely, on the receiver side, the module optically de-multiplexes a 40Gb/s input into 4 CWDM channels signals, and converts them to 4 channel output electrical data.

40G QSFP LR4 Fiber Optic Transceiver Features:

4 CWDM lanes MUX/DEMUX design
Up to 11.2Gbps per channel bandwidth
Aggregate bandwidth of > 40Gbps
Duplex LC connector
Compliant with 40G Ethernet IEEE802.3ba and 40GBASE-LR4 Standard
QSFP MSA compliant
Up to 10 km transmission
Compliant with QDR/DDR Infiniband data rates
Single +3.3V power supply operating
Temperature range 0°C to 70°C
RoHS Compliant Part

40G QSFP LR4 Fiber Optic Transceiver Applications:

Rack to rack
Data centers Switches and Routers
Metro networks
Switches and Routers
40G BASE-LR4 Ethernet Links

The central wavelengths of the QSFP-40G-LR4 4 CWDM channels are 1271, 1291, 1311 and 1331 nm as members of the CWDM wavelength grid defined in ITU-T G694.2. It contains a duplex LC connector for the optical interface and a 38-pin connector for the electrical interface. To minimize the optical dispersion in the long-haul system, single-mode fiber (SMF) has to be applied in this module.

The QSFP-40G-LR4 is designed with form factor, optical/electrical connection and digital diagnostic interface according to the QSFP Multi-Source Agreement (MSA). It has been designed to meet the harshest external operating conditions including temperature, humidity and EMI interference.

The QSFP-40G-LR4 operates from a single +3.3V power supply and LVCMOS/LVTTL global control signals such as Module Present, Reset, Interrupt and Low Power Mode are available with the modules. A 2-wire serial interface is available to send and receive more complex control signals and to obtain digital diagnostic information. Individual channels can be addressed and unused channels can be shut down for maximum design flexibility.

The QSFP-40G-LR4 is designed with form factor, optical/electrical connection and digital diagnostic interface according to the QSFP Multi-Source Agreement (MSA). It has been designed to meet the harshest external operating conditions including temperature, humidity and EMI interference. The huihongfiber 40G module offers very high functionality and feature integration, accessible via a two-wire serial interface.

  • Absolute Maximum Ratings
ParameterSymbolMin.TypicalMax.Unit
Storage TemperatureTS-40+85°C
Supply VoltageVCCT, R-0.54V
Relative HumidityRH085%

 

  • Recommended Operating Environment:
ParameterSymbolMin.TypicalMax.Unit
Case operating TemperatureTC0+70°C
Supply VoltageVCCT, R+3.133.3+3.47V
Supply CurrentICC1000mA
Power DissipationPD3.5W

 

  • Electrical Characteristics (TOP = 0 to 70 °C, VCC = 3.13 to 3.47 Volts
ParameterSymbolMinTypMaxUnitNote
Data Rate per Channel10.312511.2Gbps
Power Consumption2.53.5W
Supply CurrentIcc0.751.0A
Control I/O Voltage-HighVIH2.0VccV
Control I/O Voltage-LowVIL00.7V
Inter-Channel SkewTSK150Ps
RESETL Duration10Us
RESETL De-assert time100ms
Power On Time100ms
Transmitter
Single Ended Output Voltage Tolerance0.34V1
Common mode Voltage Tolerance15mV
Transmit Input Diff VoltageVI1501200mV
Transmit Input Diff ImpedanceZIN85100115
Data Dependent Input JitterDDJ0.3UI
Receiver
Single Ended Output Voltage Tolerance0.34V
Rx Output Diff VoltageVo370600950mV
Rx Output Rise and Fall VoltageTr/Tf35ps1
Total JitterTJ0.3UI

Note:

  1. 20~80%
  • Optical Parameters(TOP = 0 to 70 °C, VCC = 3.0 to 3.6 Volts)
ParameterSymbolMinTypMaxUnitRef.
Transmitter
Wavelength AssignmentL01264.512711277.5nm
L11284.512911297.5nm
L21304.513111317.5nm
L31324.513311337.5nm
Side-mode Suppression RatioSMSR30dB
Total Average Launch PowerPT8.3dBm
Average Launch Power, each Lane-72.3dBm
Difference in Launch Power between any two Lanes (OMA)6.5dB
Optical Modulation Amplitude,each LaneOMA-4+3.5dBm
Launch Power in OMA minus
Transmitter and Dispersion Penalty(TDP), each Lane-4.8dBm
TDP, each LaneTDP2.3dB
Extinction RatioER3.5dB
Transmitter Eye Mask Definition {X1,X2, X3, Y1, Y2, Y3}{0.25, 0.4,0.45,0.25,0.28, 0.4}
Optical Return Loss Tolerance20dB
Average Launch Power OFF Transmitter, each LanePoff-30dBm
Relative Intensity NoiseRin-128dB/HZ1
Optical Return Loss Tolerance12dB
Receiver
Damage ThresholdTHd3.3dBm1
Average Power at Receiver Input, eachLaneR-13.72.3dBm
Receiver Power (OMA), each Lane3.5dB
Receive Electrical 3 dB upper Cut offFrequency, each Lane12.3GHz
RSSI Accuracy-22dB
Receiver ReflectanceRrx-26dB
Receiver Power (OMA), each Lane3.5dBm
Stressed Receiver Sensitivity inOMA, each Lane   –-9.9  dBm
Receiver Sensitivity, each LaneSR   –-11.5dBm
Difference in Receive Power betweenany two Lanes (OMA)7.5dB
Receive Electrical 3 dB upper CutoffFrequency, each Lane12.3GHz
LOS De-AssertLOSD-15dBm
LOS AssertLOSA-30dBm
LOS HysteresisLOSH0.5dB

Note: 12dB Reflection

  • Timing for Soft Control and Status Functions
ParameterSymbolMaxUnitConditions
Initialization Timet_init2000msTime from power on1, hot plug or rising edge of Reset until the module is fully functional2
Reset Init Assert Timet_reset_init2μsA Reset is generated by a low level longer than the minimum reset pulse time present on the ResetL pin.
Serial Bus Hardware Ready Timet_serial2000msTime from power on1 until module responds to data transmission over the 2-wire serial bus
Monitor Data ReadyTimet_data2000msTime from power on1 to data not ready, bit 0 of Byte 2, deasserted and IntL asserted
Reset Assert Timet_reset2000msTime from rising edge on the ResetL pin until the module is fully functional2
LPMode Assert Timeton_LPMode100μsTime from assertion of LPMode (Vin:LPMode =Vih) until module power consumption enters lower Power Level
IntL Assert Timeton_IntL200msTime from occurrence of condition triggering IntL until Vout:IntL = Vol
IntL Deassert Timetoff_IntL500μstoff_IntL 500 μs Time from clear on read3 operation of associated flag until Vout:IntL = Voh. This includes deassert times for Rx LOS, Tx Fault and other flag bits.
Rx LOS Assert Timeton_los100msTime from Rx LOS state to Rx LOS bit set and IntL asserted
Flag Assert Timeton_flag200msTime from occurrence of condition triggering flag to associated flag bit set and IntL asserted
Mask Assert Timeton_mask100msTime from mask bit set4 until associated IntL assertion is inhibited
Mask De-assert Timetoff_mask100msTime from mask bit cleared4 until associated IntlL operation resumes
ModSelL Assert Timeton_ModSelL100μsTime from assertion of ModSelL until module responds to data transmission over the 2-wire serial bus
ModSelL Deassert Timetoff_ModSelL100μsTime from deassertion of ModSelL until the module does not respond to data transmission over the 2-wire serial bus
Power_over-ride orPower-set Assert Timeton_Pdown100msTime from P_Down bit set 4 until module power consumption enters lower Power Level
Power_over-ride or Power-set De-assert Timetoff_Pdown300msTime from P_Down bit cleared4 until the module is fully functional3

Note:

  1. Power on is defined as the instant when supply voltages reach and remain at or above the minimum specified value.
  2. Fully functional is defined as IntL asserted due to data not ready bit, bit 0 byte 2 de-asserted.
  3. Measured from falling clock edge after stop bit of read transaction.
  4. Measured from falling clock edge after stop bit of write transaction.
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